Fishing – trapping – and vermin destroying
Patent
1990-07-06
1992-05-05
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437231, 437193, 437194, 437195, H01L 21465
Patent
active
051107660
ABSTRACT:
A method of manufacturing a semiconductor device, in particular a contact portion of the wiring of the device. An insulating layer is formed on a semiconductor substrate, a contact hole is formed on the insulating layer by etching, and a first conductive layer having hollows is formed on the insulating layer and in the contact hole. Next, a flattening layer is formed to flatten the surface of device structure, and a part of the first conductive layer is exposed by etching the flattening layer to permit a part of the flattening layer to remain in hollows of device structure. Next, a second conductive layer is formed on the remaining flattening layer and the exposed part of the first conductive layer, and is connected to the semiconductor substrate.
REFERENCES:
patent: 4404733 (1983-09-01), Sasaki
patent: 4453306 (1984-06-01), Lynch et al.
patent: 4874493 (1989-10-01), Pan
patent: 4894351 (1990-01-01), Batty
J. E. J. Schmitz et al, "A New Approach to Contact Fill", Materials Research Society 1989 pp. 129-132.
Ghandhi, VLSI Fabrication Principles, John Wiley and Sons New York (1983) pp. 432-433.
Maeda Satoshi
Sawada Shizuo
Shinozaki Satoshi
Hearn Brian E.
Holtzman Laura M.
Kabushiki Kaisha Toshiba
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