Single transistor flash electrically programmable memory cell in

Details Single transistor flash electrically programmable memory cell in Single transistor flash electrically programmable memory cell in

1993-02-16

1995-03-07

Fears, Terrell W.

Static information storage and retrieval

Floating gate

Particular biasing

365218, 36518901, G11C 1140

Patent

active

053964594

ABSTRACT:
A nonvolatile semiconductor memory using a single floating gate transistor, wherein a control gate elecrrode is negatively biased while a source region is positively biased, and a writing operation is performed bit by bit by transferring electrons from the floating gate into the source region through Fowler-Nordheim tunneling. And an erasing operation is performed by injecting channel hot electrons from the drain region into the floating gate, or by injecting electrons from a substrate into the floating gate through Fowler-Nordheim tunneling. The source region is connected to an individual bit line, and the drain region to a common line so that over-erasing is averted.

REFERENCES:
patent: 4161039 (1979-07-01), Rossler
patent: 4409723 (1983-10-01), Harari
patent: 4903236 (1990-02-01), Nakayama et al.
IEEE Journal of Solid-State Circuits, Vo. 17, No. 5, Oct. 1982, pp. 821-827.
International Electron Devices Mtg., Dec. 1987; pp. 560-563.

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