Scanning circuit to deliver train of pulses shifted by a constan

Details Scanning circuit to deliver train of pulses shifted by a constan Scanning circuit to deliver train of pulses shifted by a constan

1974-08-19

1977-03-08

Martin, John C.

Facsimile and static presentation processing

Facsimile

Recording apparatus

178 76, 307208, 307251, H04N 314, H03K 1756, H03K 1760

Patent

active

040114023

ABSTRACT:
In a scanning circuit having a plurality of cascade-connected unit circuits driven only by direct current, each unit circuit consisting of at least a pair of polarity inverting circuits, a train of output pulses shifted by a constant delay one after another depending upon the delay time proper to the unit circuits, are derived from the unit circuits by applying an input pulse to the first stage of the scanning circuit.

REFERENCES:
patent: 3581097 (1971-05-01), Hibi et al.
patent: 3622809 (1971-11-01), Williams
patent: 3643106 (1972-02-01), Berwin et al.
patent: 3676590 (1972-07-01), Weimer
patent: 3676711 (1972-07-01), Ahrons
patent: 3715485 (1973-02-01), Weimer
patent: 3731161 (1973-05-01), Yamamoto
Millman et al., Pulse, Digital and Switching Waveforms, McGraw Hill, New York, 1965, p. 669.
Kiver, Transistors, McGraw-Hill, 1959, pp. 297-303.
Lee, "FET Delay Circuit . . .", IBM Technical Disclosure Bulletin, vol. 14, No. 4, Sept. 1971, pp. 1082-1083.

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