Method of manufacturing shallow junction field effect transistor

Details Method of manufacturing shallow junction field effect transistor Method of manufacturing shallow junction field effect transistor

1993-12-01

1995-03-07

Fourson, George

Fishing, trapping, and vermin destroying

437160, 437162, 437 29, 437200, 437 41, 437 34, H01L 21265

Patent

active

053957873

ABSTRACT:
Shallow junctions n- and p-channel field effect transistors are formed with a single ion implant into a conformal tungsten silicide layer. Although phosphorous and boron are implanted into the same silicide regions, the phosphorous prevents the boron from outdiffusing.

REFERENCES:
patent: 4844776 (1989-07-01), Lee et al.
patent: 4922311 (1990-05-01), Lee et al.
patent: 5268317 (1993-12-01), Schwalke et al.
patent: 5279976 (1994-01-01), Hayden
patent: 5281552 (1994-01-01), King et al.
Wolf, S. "Silicon Processing for the VLSI Era", Lattice Press, Sunset Beach, CA. (1990).

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