Fishing – trapping – and vermin destroying
Patent
1994-03-17
1995-03-07
Wojciechowicz, Edward
Fishing, trapping, and vermin destroying
437 30, 437 44, 437 84, 437913, 257336, 257344, 257347, H01L 21265, H01L 2968
Patent
active
053957725
ABSTRACT:
An SOIMOS transistor device which comprises a substrate, an insulating film formed on the substrate, a source and a drain sandwiching a channel region therebetween and formed on the insulating film is described. The channel region has regions in contact with the source and the drain, respectively, and each region has a concentration of an impurity lower than those of the source and the drain, and a gate electrode is formed on the SOI layer. The regions are formed by diffusion of the impurity from the source and the drain in lateral directions, respectively, and extending beneath the gate electrode along the thickness of the source and the drain.
REFERENCES:
patent: 4575925 (1986-03-01), Kanbara et al.
patent: 4939558 (1990-07-01), Smayling et al.
patent: 5089865 (1992-02-01), Mitsui et al.
patent: 5170232 (1992-12-01), Narita
Hashimoto et al, "Low Leadage SOIMOSFETs Fabricated Using a Wafer Bonding Method", Extended Abstract of the 21st Conference on Solid State Devices and Materials, Tokyo, 1989, pp. 89-92.
Hashimoto Makoto
Miyazawa Yoshihiro
Sony Corporation
Wojciechowicz Edward
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