1990-01-09
1991-10-29
LaRoche, Eugene R.
357 68, 357 80, 357 81, H01L 2348
Patent
active
050619870
ABSTRACT:
A multichip electronic package uses a silicon substrate for chip mounting and interconnects, micro-machined inverted and non-inverted truncated vias for intrinsically hermetically sealed I/O connections, and an anodically bonded silicon cover, with support posts. Stacked, colocated and inverted vias are provided for increased chip and interconnect density within an intrinsically sealed, thermally matched package.
REFERENCES:
patent: 3372070 (1968-03-01), Zuk
patent: 4446477 (1984-06-01), Currie et al.
patent: 4516148 (1985-06-01), Barth
patent: 4646126 (1987-02-01), Iizuka
patent: 4937660 (1990-06-01), Dietrich
Anderson Terry J.
Block Robert B.
LaRoche Eugene R.
Northrop Corporation
Ratliff R.
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