Hardware simulator capable of reducing an amount of information

Details Hardware simulator capable of reducing an amount of information Hardware simulator capable of reducing an amount of information

1987-10-21

1990-07-31

Lall, Parshotam S.

Boots, shoes, and leggings

364490, 364491, 371 23, G06F 1520, G06F 738

Patent

active

049455036

ABSTRACT:
In a hardware simulator for use in successively carrying out simulations of gates arranged in a logic circuit, a plurality of connection data signals are stored in a connection memory to specify connections among the gates while a plurality of gate species data signals are stored in a gate species memory to represent each species of the gates. Responsive to a test data signal, a processing circuit executes each simulation of the gates with references to both the connection and the gate species data signals read out of the connection memory and the gate species memory, and supplies a simulation result signal to one of several status memories. Each simulation may be carried out in a pipeline fashion. Alternatively, the connection data signals can be derived from a modified logic circuit obtained by rearranging the logic circuit.

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