High speed stack circuit for register data in a microcomputer

Details High speed stack circuit for register data in a microcomputer High speed stack circuit for register data in a microcomputer

1989-10-11

1990-07-31

Harkcom, Gary V.

Boots, shoes, and leggings

3642542, G06F 946, G06F 1340

Patent

active

049454692

ABSTRACT:
In a microcomputer in which a random access memory and a central processing unit are mounted on one chip and connected therebetween by a bus line. Bit lines of the memory are extended to internal registers of the central processing unit and a connecting portion which can read and write is provided therebetween. When data of the internal register is saved, one word line of the memory is selected and each bit of the data is transferred at the same time to a memory cell group connected to the word line.

REFERENCES:
patent: 3602889 (1971-08-01), Gayman et al.
patent: 3810114 (1974-05-01), Yamada et al.
patent: 3956737 (1976-05-01), Ball
patent: 4193127 (1980-03-01), Gersbach
patent: 4554645 (1985-11-01), Furman
patent: 4654780 (1987-03-01), Logsdon et al.
Stone, Microcomputer Interfacing, 1982, FIG. 4.7, p. 133.
IGEL, IBM Technical Disclosure Bulletin, vol. 17, No. 12, May 1975, pp. 3708-3710.

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