1989-12-11
1990-07-31
James, Andrew J.
357 45, H01L 2702
Patent
active
049453955
ABSTRACT:
A semiconductor circuit comprises basic cells formed in an internal cell region on an integrated-circuit chip and pads for input/output cells, the pads being arranged in peripheral regions on said chip. The semiconductor circuit further comprises first logic circuit means provided for each of the input/output cells, each including logic circuits formed by transistors of relatively high drive capability which are a part of said respective input/output cells, the first logic circuit means being positioned in the perpheral regions. The present invention also comprises second logic circuit means provided for each of the input/output cells, each including remaining logic circuits of the respective input/output cells, the second logic circuit being formed by the basic cells formed in the internal cell regions, so that each of said input/output cells is formed by one pad and the combination of the first and second logic circuit means.
REFERENCES:
patent: 4682202 (1987-07-01), Tanizawa
patent: 4733288 (1988-03-01), Sato
Fujitsu Limited
James Andrew J.
Prenty Mark
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