Process tolerant delay circuit

Details Process tolerant delay circuit Process tolerant delay circuit

1996-05-31

1998-06-23

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

327288, H03H 1126

Patent

active

057709602

ABSTRACT:
A process tolerant delay circuit includes a plurality of inverters that receive an input signal and provide an output signal related to the input signal but including a propagation delay of the plurality of inverters. At least one inverter comprises FETs of minimum channel lengths dependent upon a fabrication process by which the circuit was made. Accordingly, the plurality of inverters have a propagation delay dependent upon the fabrication process. A delay compensation device receives the output signal of the inverters and provides a compensated output signal related to the received signal but including a variable delay established in accordance with a control signal. A process sense stack provides the control signal only during a transition of the input signal, and with a value dependent upon a channel length of a FET device thereof. Thus, the plurality of inverters and delay compensation device operate together, per the control signal of the process sense stack, to provide a circuit capable of compensating for process degradations in order to provide a given delay in accordance with variations in the fabrication process by which they were made.

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IBM Technical Disclosure Bulletin, "Process Tracking Delay Element", Author -M. Ueda; vol. 36, No. 09A, Sep. 1993.

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