Hierarchical data storage system employing contemporaneous trans

Details Hierarchical data storage system employing contemporaneous trans Hierarchical data storage system employing contemporaneous trans

1995-11-13

1997-01-14

Kim, Matthew M.

395463, 395492, 395471, G06F 1208

Patent

active

055948839

ABSTRACT:
A method and system control approach for contemporaneous transfer of designated replacement pages from a main store to an associated memory having a write cycle 10.times. longer than a read cycle thereof (e.g. nonvolatile semiconductor memory). Each designated data page includes an associated home address within the nonvolatile semiconductor memory. The approach includes designating at least two data pages of the main store for transfer to the nonvolatile semiconductor memory; and upon occurrence of a predetermined condition, contemporaneously transferring the designated data pages from the main store to the nonvolatile semiconductor memory for writing into the nonvolatile semiconductor memory at their associated addresses. Preferably, the designated data pages are simultaneously written in the nonvolatile semiconductor memory subsequent to a simultaneous erase of their associated home addresses.

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