Static information storage and retrieval – Floating gate – Particular biasing
Patent
1996-03-11
1997-01-14
Nelms, David C.
Static information storage and retrieval
Floating gate
Particular biasing
3651853, 36518533, 3651852, 365236, 365201, 3652257, 36518509, G11C 1604
Patent
active
055946895
ABSTRACT:
A flash memory having a defective count circuit. In an erasing operation, when an erase and an erase verify are repeatedly performed, the defective count circuit counts the number of unerased memory cells having a slow erase speed, in the course of the erase verify. If the counted number of the unerased memory cells becomes higher than a predetermined number, the erase verify is stopped, and the erase is performed again. On the other hand, if the counted number of the unerased memory cells is not higher than a predetermined number, the erasing operation is completed. Therefore, most of memory cells excluding a small number of memory cells having slow erase speed are properly erased with no over-erasing.
REFERENCES:
patent: 5327384 (1994-07-01), Ninomiya
patent: 5532959 (1996-07-01), Ninomiya et al.
NEC Corporation
Nelms David C.
Tran Andrew Q.
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