Patent
1992-04-23
1997-05-13
Lee, Thomas C.
395800, G06F 930
Patent
active
056300840
ABSTRACT:
A data processing device including: data processor handling at one time a plurality of data such as instructions each consisting of one word; a plurality of input ports for inputting a plurality of data; a memory for storing temporarily the data inputted through the input pins, each of whose elements consisting of one byte; and exclusive OR gates for designating each of the elements of the memory. Each portion of a memory element is referenced by a byte address each consisting two bits wherein when the information device can handle data formed in a Little-endian-type, in which the address are increased in sequence from the byte on the Least significant Bit (LSB), and the data is formed in a big-endian-type, in which the byte address are increased in sequence from the byte on the Most Significant Bit (MSB), the exclusive OR gates reverse some of the bits of each byte address.
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Kabushiki Kaisha Toshiba
Lee Thomas C.
Meky Moustafa M.
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