Semiconductor integrated circuit having multiple-layered connect

Details Semiconductor integrated circuit having multiple-layered connect Semiconductor integrated circuit having multiple-layered connect

1986-08-07

1987-09-15

Edlow, Martin H.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

357 68, 357 51, 357 55, 307467, H01L 2702, H01L 2348, H01L 2944, H01L 2952

Patent

active

046943200

ABSTRACT:
A semiconductor integrated circuit having a multiple-layered connection comprises a semiconductor substrate (11), having circuit elements (Tr1, Tr2, Tr3, R1, R2, R3, R4) formed in a first region (16) of the surface of the substrate (11). A first insulating layer (12) is formed to cover the surface of the substrate (11) and, a first electrode layer (13) is formed on the first insulating film (12) to include a first portion of connection runs (13') extending in parallel in the first region (16) for connection to the circuit elements and a second portion of connection runs (13") in a second region (17). A second insulating layer (14) is then formed to cover the first insulating layer (12) and the first electrode layer (13), and a second electrode layer (15) is formed on the second insulating layer to include connection runs (18) extending in parallel and intersecting the connection runs of the first electrode layer (13) at the right angle between first and second regions (16 and 17) for connection to the connection runs (3') of the first portion and to the connection runs (13") of the second portion of the first electrode layer (13).

REFERENCES:
patent: 4499484 (1985-02-01), Tanizawa et al.
patent: 4500906 (1985-02-01), Ohno et al.

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