Patent
1984-05-21
1987-09-15
James, Andrew J.
357 235, 357 43, 357 52, 357 54, H01L 2974, H01L 2952, H01L 2978, H01L 2940
Patent
active
046943196
ABSTRACT:
A planar type thyristor has a semiconductor substrate of one conductivity type, a first and second regions of other conductivity type formed in the substrate and a third region of the one conductivity type formed in one of the first and second regions. An electrically floating electrode is formed on the substrate between the first and second region via an insulator film and a control electrode is formed on the floating electrode via another insulator film. A gate trigger current is controlled by a voltage applied to the control electrode.
REFERENCES:
patent: 2993154 (1961-07-01), Goldey et al.
patent: 3461324 (1969-08-01), Barry
patent: 3893085 (1975-07-01), Hansen
patent: 4143421 (1979-03-01), Tonnel et al.
patent: 4334347 (1982-06-01), Goldsmith et al.
Shepard "Preventing Surface Inversion Under Thick Oxide of N-Channel IGFET's" IBM Tech. Discl. Bull. vol. 16, No. 3, Aug. 1973, pp. 702-703.
James Andrew J.
Lamont John
NEC Corporation
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