Fishing – trapping – and vermin destroying
Patent
1996-03-19
1997-01-14
Nguyen, Tuan H.
Fishing, trapping, and vermin destroying
437 47, 437 52, 437919, 437228, 148DIG14, H01L 2170
Patent
active
055939147
ABSTRACT:
A method for fabricating an integrated circuit having at least one integrated circuit component fabricated in a silicon substrate and a second device that is to be fabricated on a silicon oxide layer that covers the integrated circuit component. The integrated circuit component has a terminal that is to be connected a corresponding terminal on the second device. The second device includes an electrode structure in contact with a dielectric component that includes a layer of ferroelectric material. In the method of the present invention, a boundary layer comprising non-conducting polysilicon is deposited over the silicon oxide layer. The electrode structure is then fabricated by depositing one or more layers over the boundary layer. The ferroelectric layer is then deposited over the electrode structure and etched to provide the dielectric component. The boundary layer is then removed utilizing an etchant that etches silicon oxide much slower than polysilicon.
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patent: 5519235 (1996-05-01), Ramesh
Boyer Leonard O.
Evans, Jr. Joseph T.
Nguyen Tuan H.
Radiant Technologies, Inc.
Ward Calvin B.
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