Method of forming stacked barrier-diffusion source and etch stop

Details Method of forming stacked barrier-diffusion source and etch stop Method of forming stacked barrier-diffusion source and etch stop

1995-02-23

1997-01-14

Fourson, George

Fishing, trapping, and vermin destroying

257585, 257592, 257593, 148DIG10, 148DIG11, 437153, 437162, 437163, 437164, 437187, H01L 21265

Patent

active

055939058

ABSTRACT:
A bipolar transistor (100) and a method for forming the same. A base-link diffusion source layer (118) is formed over a portion of the collector region (102). The base-link diffusion source layer (118) comprises a material that is capable of being used as a dopant source and is capable of being etched selectively with respect to silicon. A barrier layer (119) is formed over the base-link diffusion source layer (118).A base electrode (114) is formed over at least one end portion of the barrier layer (119) and base-link diffusion source layer (118) and the exposed portions of the barrier layer (119) and underlying base-link diffusion source layer (118) are removed. An extrinsic base region (110) is diffused from the base electrode (114) and a base link-up region (112) is diffused from the base-link diffusion source layer (118). Processing may then continue to fore an intrinsic base region (108), emitter region (126), and emitter electrode (124).

REFERENCES:
patent: 4693782 (1987-09-01), Kikuchi et al.
patent: 4960726 (1990-10-01), Lechaton et al.
patent: 4975381 (1990-12-01), Taka et al.
patent: 5232861 (1993-08-01), Miwa
patent: 5242847 (1993-09-01), Ozturk et al.
patent: 5279976 (1994-01-01), Hayden et al.
patent: 5302535 (1994-04-01), Imai et al.
patent: 5322805 (1994-06-01), Allman et al.
patent: 5342794 (1994-08-01), Wei
patent: 5403757 (1995-04-01), Suzuki
patent: 5403758 (1995-04-01), Yoshihara
patent: 5407847 (1995-04-01), Hayden et al.
patent: 5424228 (1995-06-01), Imai
Kiyotaka Imai, Yasushi Kinoshita, Toru Yamazaki, Toru Tatsumi and Tsutomu Tashiro; "A Low Donor Concentration Retrograde Profile Si Bipolar Transistor For Low-Temperature BiCMOS LSI's"; 1994 Symposium on VLSI Technology Digest of Technical Papers; pp. 159-160.
V. dela Torre, J. Foerstner, B. Lojek, K. Sakamoto, S. L. Sundaram, N. Tracht, B. Vasquez and P. Zdebel; "MOSAIC V--Very High Performance BiPolar Technology"; IEEE 1991 BiPolar Circuits and Technology Meeting 1.3.
M. Sugiyama, H. Takemura, C. Ogawa, T. Tashiro, T. Morikawa and M. Nakamae; "A 40GHz f.sub.T Si BiPolar Transistor LSI Technology"; 1989 IEEE, IEDM 89, pp. 221-224.
H. Takamura, S. Ohi, M. Sugiyama, T. Tashiro and M. Nakamae; "BSA Technology for Sub-100nm Deep Base BiPolar Transistors"; 1987 IEEE, IEDM 87, pp. 375-378.

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