Microprocessor including an efficient implemention of an accumul

Details Microprocessor including an efficient implemention of an accumul Microprocessor including an efficient implemention of an accumul

1998-01-28

1999-06-29

Pan, Daniel H.

Boots, shoes, and leggings

39580006, 395563, 39590005, 36474801, G06F 750, G06F 9302, G06F 940

Patent

active

059180625

ABSTRACT:
An execution unit configured to perform a plurality of arithmetic operations using the same set of operands. These operands include corresponding input vector values in each of a plurality of input registers. The execution unit is coupled to receive these input vector values, as well as an instruction value indicative of one of the plurality of arithmetic operations. In one embodiment, the plurality of arithmetic operations includes a vectored add instruction, a vectored subtract instruction, a vectored reverse subtract instruction, and an accumulate instruction. The vectored instructions perform arithmetic operations concurrently using corresponding values from each of the plurality of input registers. The accumulate instruction, however, is executable to add together all input values within a single input register. The execution unit further includes a multiplexer unit configured to selectively route the input vector values to a plurality of adder units according to the opcode value. In an embodiment in which the execution unit is configured to perform subtraction operations as well as addition, the multiplexer unit is additionally configured to selectively route negated versions (either one's or two's complement format) to the plurality of adder units. Each of the plurality of adder units is configured to generate a sum based upon the values conveyed from the multiplexer unit. The accumulate instruction advantageously allows important operations such as the matrix multiply to be performed rapidly. Because the matrix multiply is an integral part of many applications (particularly graphics applications), the accumulate instruction may lead to increased overall system performance.

REFERENCES:
patent: 4769779 (1988-07-01), Chang et al.
patent: 4791555 (1988-12-01), Garcia et al.

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