Routing of clock signals in a data processing circuit with a pow

Details Routing of clock signals in a data processing circuit with a pow Routing of clock signals in a data processing circuit with a pow

1997-02-20

1999-06-29

Auve, Glenn A.

395311, 395560, 39575003, 39575004, 39575006, G06F 132

Patent

active

059180587

ABSTRACT:
The present invention provides a data processing circuit with a power saving mode of operation. The data processing circuit comprises a clock generator for generating a clock signal, and a plurality of clocked circuit elements. In accordance with the present invention, a main bus is arranged to provide the clock signal to the plurality of clocked circuit elements in a first mode of operation, and a power saving bus separate from the main bus is arranged to provide the clock signal to a subset of said plurality of clocked circuit elements in a power saving mode of operation. Further, a clock switcher circuit is provided for switching the clock signal to either the main bus or the power saving bus dependent on the mode of operation.
By this approach, the clock signal is routed only to the subset of circuit elements which require to be clocked in each mode of operation, and the length of bus routing and number of loads attached to the clock bus can be reduced for each operating mode, thus reducing the power consumption across all operating modes of the device.

REFERENCES:
patent: 4947411 (1990-08-01), Shiraishi et al.
patent: 5025387 (1991-06-01), Frame
patent: 5086387 (1992-02-01), Arroyo et al.
patent: 5274828 (1993-12-01), McAdams
patent: 5291528 (1994-03-01), Vermeer
patent: 5361290 (1994-11-01), Akiyama
patent: 5392437 (1995-02-01), Matter et al.
patent: 5455923 (1995-10-01), Kaplinsky
patent: 5669003 (1997-09-01), Carmean et al.
patent: 5677849 (1997-10-01), Smith
patent: 5696953 (1997-12-01), Wong et al.
patent: 5708771 (1998-01-01), Brandt et al.
patent: 5740386 (1998-04-01), Miller et al.
patent: 5742514 (1998-04-01), Bonola
patent: 5774702 (1998-06-01), Mitsuishi et al.
patent: 5778237 (1998-07-01), Yamamoto et al.

Affiliated with

Also associated with

Rating

Routing of clock signals in a data processing circuit with a pow does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Routing of clock signals in a data processing circuit with a pow, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Routing of clock signals in a data processing circuit with a pow will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1385457