Simulation method of silicide reaction for use with production o

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G06F 9455

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059180366

ABSTRACT:
The invention provides a simulation method of a silicide reaction for use with production of semiconductor devices which sufficiently verifies production of silicide of a high resistance value. In the simulation method, a high melting point metal having a first film thickness is attached to a silicon layer having a first width and heat treatment of the high melting point metal and the silicon layer is performed, and then, a minimum value of the first width with which a silicide reaction of the high melting point metal is not suppressed. Thereafter, a yield strength of the high melting point metal with the first film thickness is calculated, and then, and a silicide reaction force at an interface between the high melting point metal and the silicon is calculated from the yield strength and the minimum value of the first width. Finally, when the silicide reaction force is higher than the yield strength, a diffusion equation is solved, but when the silicide reaction force is lower than the yield strength, it is discriminated that sufficient silicification is not performed.

REFERENCES:
patent: 5161728 (1992-11-01), Li
Modeling of Local Reduction in TiSi2 and CoSi2 Growth Near Spacers in MOS Technologies: Influence of Mechanical Stress and Main Diffusing Species Fornara and Poncet, May 1996, pp. 73-76.
Grid Adaptation Near Moving Boundaries in Two Dimensions For IC Process Simulation Law, Oct., 1995, pp. 1223-1230.
Technology Limitations For N+/P+ Polycide Gate CMOS Due to Lateral Dopant Diffusion in Silicide/Polysilicon Layers Chu et al., Jun., 1991.
Crandle, et al. "A Two-Dimensional Process Model for Silicide Growth", International Workshop on VLSI Process and Device Modeling, 1993, pp. 68-69.

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