Fuse having a dielectric layer between sloped insulator sidewall

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357 54, 357 90, H01L 2702, H01L 2934

Patent

active

051463075

ABSTRACT:
A method for forming a fuse for integrated circuits and a fuse produced therefrom is disclosed. The fuse (10) includes a substrate (12) having thick oxide layers (14) with a gap (16) formed therebetween. A second oxide layer (20) is grown onto an N+ region (18). At the intersection between oxide layers (20, 14), a sublithographic area is exposed and a dielectric layer (24) is formed therein. This structure is capable of reducing the capacitance between a polysilicon layer (26) formed thereon and the N+ diffusion region (18).

REFERENCES:
patent: 4502208 (1985-03-01), McPherson
patent: 4543594 (1985-09-01), Mohsen et al.
patent: 4598462 (1986-07-01), Chandrasekhar
patent: 4635345 (1987-01-01), Hankins et al.
patent: 4823181 (1989-04-01), Moshen et al.
patent: 4847732 (1989-07-01), Stopper et al.
patent: 4876220 (1989-10-01), Moshen et al.
patent: 5008721 (1991-04-01), Gill et al.

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