Patent
1991-05-15
1992-09-08
Carroll, J.
357 54, 357 90, H01L 2702, H01L 2934
Patent
active
051463075
ABSTRACT:
A method for forming a fuse for integrated circuits and a fuse produced therefrom is disclosed. The fuse (10) includes a substrate (12) having thick oxide layers (14) with a gap (16) formed therebetween. A second oxide layer (20) is grown onto an N+ region (18). At the intersection between oxide layers (20, 14), a sublithographic area is exposed and a dielectric layer (24) is formed therein. This structure is capable of reducing the capacitance between a polysilicon layer (26) formed thereon and the N+ diffusion region (18).
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Bassuk Lawrence J.
Brady III W. James
Carroll J.
Donaldson Richard L.
Texas Instruments Incorporated
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