Semiconductor memory device for temporarily storing digital imag

Static information storage and retrieval – Addressing – Plural blocks or banks

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365222, 36518901, 36523016, G11C 800

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active

059177705

ABSTRACT:
A semiconductor memory device of the present invention includes a memory cell array including m sub-arrays, each having a number of memory cells arranged in a matrix and including M/m (m is an integer of 2 or more; M/m is an integer of 2 or more) memory rows and N (N is an integer of 2 or more) memory columns. In an image space in a matrix including M pixel rows and N pixel columns, the M pixel rows are divided into M/m blocks, m pixel rows in each of the M/m blocks are in a one-to-one correspondence with the m sub-arrays, and the M/m blocks are in a one-to-one correspondence with the M/m memory rows in each of the sub-arrays. The semiconductor memory device also includes a row address control circuit for, in a case where a pixel address of data on the image space is input, accessing the memory cell array by selecting a memory row corresponding to a block to which the data belongs in a sub-array corresponding to a pixel row of the block to which the data belongs.

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English Abstract of Japanese Laid-Open Publication No. 5-54644 (Mar. 5, 1993).

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