Sensing circuitry for reading and verifying the contents of elec

Details Sensing circuitry for reading and verifying the contents of elec Sensing circuitry for reading and verifying the contents of elec

1997-04-29

1999-06-29

Yoo, Do Hyun

Static information storage and retrieval

Floating gate

Particular biasing

3651852, 36518522, 365207, 365210, G11C 700

Patent

active

059177535

ABSTRACT:
A sense amplifier circuit for reading and verifying the contents of non-volatile memory cells in a semiconductor integrated device including a memory matrix of electrically programmable and erasable cells. The circuit includes a sense amplifier which has a first input connected to a reference load column incorporating a reference cell, and a second input connected to a second matrix load column incorporating a cell of the memory matrix. The circuit also includes a small matrix of reference cells connected, in parallel with one another, in the reference load column. Also provided is a double current mirror having a first mirror column which is connected to a node in the reference load column connected to the first input, and a second mirror column coupled to the second matrix load column to locally replicate, on the second mirror column, the electric potential at the node during a load equalizing step.

REFERENCES:
patent: 5289412 (1994-02-01), Frary et al.
patent: 5386388 (1995-01-01), Atwood et al.
patent: 5444656 (1995-08-01), Bauer et al.
patent: 5654919 (1997-08-01), Kwon
Atsumi, Shigeru, et al., "Fast programmable 256K Read Only Memory with On-Chip Test Circuits," IEEE Transactions on Electron Devices ED-32(2):502-507, 1985.

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