Patent
1991-08-16
1992-09-08
Prenty, Mark V.
357 234, 357 34, 357 48, H01L 2980, H01L 2910, H01L 2972, H01L 2704
Patent
active
051462982
ABSTRACT:
An insulated gate field effect transistor with an extended drain region is presented. The extended drain region includes a single-sided JFET and a double-sided JFET connected in parallel. The insulated gate field effect transistor is built on a substrate of first conductivity type. A pocket of semiconductor material of second conductivity type is within the substrate adjoining a surface of the substrate. A body region of semiconductor material of the first conductivity type is within the pocket adjoining the surface of the substrate. Also, a source region of semiconductor material of the second conductivity type is within the body region adjoining the surface of the substrate. A drain contact region of semiconductor material of the second conductivity type is also within the pocket of semiconductor material adjoining the surface of the substrate. A first intermediate region of semiconductor material of the first conductivity type is within the pocket of semiconductor material between the body region and the drain contact region. The first intermediate region adjoins the surface of the substrate. Also, a second intermediate region of semiconductor material of second conductivity type is within the pocket of semiconductor material between the body region and the drain contact region. The second intermediate region also adjoins the surface of the substrate. A portion of the second intermediate region extends between the first intermediate region and the surface of the substrate.
REFERENCES:
patent: 4626879 (1982-12-01), Colack
patent: 4811075 (1989-03-01), Eklund
Sel Colak, "Effects of Drift Region Parameters on the Static Properties of Power LDMOS", IEEE Transactions on Electron Devices, vol. ED-28, No. 12, pp. 1455-1466 (Dec. 1981).
A. W. Ludikhulze, High-Voltage DMOS and PMOS in Analog IC's, IEDM, pp. 81-84 (1982).
Prenty Mark V.
Weller Douglas L.
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