Serial bus for transmitting interrupt information in a multiproc

Details Serial bus for transmitting interrupt information in a multiproc Serial bus for transmitting interrupt information in a multiproc

1997-09-19

1999-04-06

Ray, Gopal C.

395739, 395868, G06F 946

Patent

active

058929568

ABSTRACT:
A programmable interrupt controller for use in a multiprocessing environment that can support a serial bus to send interrupt information to the processors. The interrupt serial bus has a data line to drive all the interrupt information to all the processors and a clock line to synchronize edges for the data stream. A third line, normally tri-stated, may be used to provide a parity error indication for the serial bus. The serial data includes a processor identification, a pin identification and state information. As the programmable interrupt controller sends the interrupt data on the serial bus, all the processors clock the data and check parity. If a processor finds a parity error, it drives the parity error indication low so that the information may be transmitted again. No processor will execute the command contained in the serial message before the time has elapsed for any of the processors to report a parity error. If there is no parity error, the processor accepts and decodes the message and asserts or deasserts the appropriate signal.

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