Method for generating hardware description of multiplier and/or

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364754, 364758, G06F 700, G06F 1500

Patent

active

054735580

ABSTRACT:
A method for generating a hardware description of a multiplier/multiplier-adder for integrating a signal processing circuit includes the steps of acquiring input parameters such as a word length of multiplier factor, generating a first hardware description of a first add for adding partial products and an inputs addend, determining a redundancy index r by using the input parameters, generating a second hardware description of a second add circuit for performing a carry-add of every r bits of the output of the first add circuit, and replacing useless circuits from the hardware descriptions.

REFERENCES:
patent: 4736335 (1988-04-01), Barkan
patent: 4852037 (1989-07-01), Aoki

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