Method of obtaining a diode whose contact tapping is self aligne

Details Method of obtaining a diode whose contact tapping is self aligne Method of obtaining a diode whose contact tapping is self aligne

1986-01-24

1987-09-15

Roy, Upendra

Fishing, trapping, and vermin destroying

148DIG82, 437233, H01L 21225, H01L 21265

Patent

active

046929959

ABSTRACT:
A method is provided for obtaining a diode whose contact tapping is self aligned with a gate, consisting in depositing on a semiconductor substrate at least a first layer of a dielectric material, depositing on the last dielectric layer a first layer of polycrystalline silicon so as to form the gate, then a second polycrystalline silicon layer above the first layer, etching in the polycrystalline silicon layers the position of the contact diode until the dielectric layer is laid bare, oxidizing the second polycrystalline silicon layer sufficiently for the oxidized layer to completely cover the first polycrystalline silicon layer forming the gate and only to partially cover the part of the dielectric layer laid bare, and doping the portion of the substrate not covered by the oxide layer so as to form the junction of the diode.

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IEEE Electron Device Letters, vol. EDL-3, No. 2, Feb. 1982, pp. 40-42, IEEE, New York, U.S.; S. Hsia et al.: "Polysilicon Oxidation Self-Aligned . . . ".
IBM Technical Disclosure Bulletin, vol. 22, No. 8B, Jan. 1980, pp. 3688-3691, New York, U.S.; R. C. Varshney: "Polysilicon Oxide Process . . . ".
IEDM International Electron Devices Meeting, Washington D.C., 8-10 Dec. 1980, Technical Digest, Papier 6.3, pp. 140-143, IEEE, . . .

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