Weighted summation circuitry with digitally controlled capacitiv

Details Weighted summation circuitry with digitally controlled capacitiv Weighted summation circuitry with digitally controlled capacitiv

1994-05-26

1995-12-26

Davis, George B.

G06F 1542

Patent

active

054795788

ABSTRACT:
An array of weighted summation circuits, N in number, each generate a weighted sum response to the same plurality of input signals, M in number. Each weighted summation circuit includes at least one corresponding capacitive element for determining the weighting of each of the input signals within that weighted summation circuit. At least one corresponding capacitive element is of a programmable type having its capacitance value determined in accordance with the bits of a digital word received at a control word port thereof. The array of weighted summation circuits are preferably constructed in integrated circuit form together with an interstitial memory having respective word storage elements for temporarily storing the digital words applied to the control word ports of nearby capacitive elements in the integrated circuitry.

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