Layout structure of capacitive element(s) and interconnections i

Details Layout structure of capacitive element(s) and interconnections i Layout structure of capacitive element(s) and interconnections i

1997-05-30

1999-04-06

Hardy, David B.

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

257535, 257919, H01L 2941

Patent

active

058922660

ABSTRACT:
The present invention reduces parasitic capacitance in a capacitive element distribution system by running unit electrode lead lines and common electrode lead lines in different directions so that the conductor lines may be sufficiently separated to suppress parasitic capacitance.

REFERENCES:
patent: 4654689 (1987-03-01), Fujii
patent: 4870541 (1989-09-01), Cole
patent: 4929998 (1990-05-01), Boudewijns
patent: 5322438 (1994-06-01), McNutt
M.J. McNutt, et al. "Systematic Capacitance Matching Errors and Corrective Layout Procedures", IEEE Journal of Solid-State Circuits, No. 5, May 1994, New York, pp. 611-616.

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