Method of monitoring an error correction of a plurality of compu

Details Method of monitoring an error correction of a plurality of compu Method of monitoring an error correction of a plurality of compu

1987-10-09

1989-08-01

Pellinen, A. D.

Excavating

364200, 36442401, 371 9, 371 16, G06F 1100

Patent

active

048539325

ABSTRACT:
To permit rapid checking of possible malfunctions or erroneous computations in data processing cycles, in which a plurality of computer units carry out processing of data, especially to supervise and control safety apparatus, each one of the units generate intermediate information data at predetermined time intervals, which intermediate information data are transmitted to each one of the other units. The so-received intermediate information data are buffer-stored and compared in all the units with locally generated check data. If the comparison indicates coincidence, computation is continued through subsequent processing cycles; if an error is detected, at least that computer unit which processes the data erroneously is reset to repeat at least the preceding computation cycle, and the unit which detected the error is placed into a "set-and-hold" mode. The intermediate information data may be derived, for example, in form of a quotient of a beginning and terminal address; additionally, the time of arrival of the intermediate information data can be checked against a time marker, thereby detecting and providing for correction of both computation as well as timing errors.

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patent: 4030074 (1977-06-01), Giorcelli
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patent: 4198678 (1980-04-01), Maatje et al.
patent: 4392199 (1983-07-01), Schmitter et al.
patent: 4616312 (1986-10-01), Uebel

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