Method of fabricating lightly doped drain transistor device

Details Method of fabricating lightly doped drain transistor device Method of fabricating lightly doped drain transistor device

1994-08-23

1995-12-05

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 46, 437157, H01C 21265, H01C 218234

Patent

active

054728940

ABSTRACT:
A lightly doped drain (LDD) transistor device structure and a method of fabricating same are described. A silicon substrate is provided which has a trench formed therein. Polysilicon sidewall spacers are formed on the side walls of the trench. Silicon dioxide sidewall spacers are formed on the side walls of the polysilicon sidewall spacers. A gate oxide layer is formed on the bottom of the trench by oxidation. A polysilicon gate layer is formed filling the trench. Impurities are implanted into the silicon substrate to simultaneously form heavily doped source/drain areas in spaced apart portions of the silicon substrate adjacent to the polysilicon sidewall spacers, improve the conductivity of the polysilicon gate layer, and form lightly doped source/drain areas in spaced apart portions of the silicon substrate under the silicon dioxide sidewall spacers.

REFERENCES:
patent: 5021355 (1991-06-01), Dhong et al.
patent: 5270234 (1993-12-01), Huang et al.
patent: 5270257 (1993-12-01), Shin
patent: 5395772 (1995-03-01), Miyazawa et al.

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