Saving registers in data processing apparatus

Details Saving registers in data processing apparatus Saving registers in data processing apparatus

1987-06-04

1989-02-28

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 104, G06F 922

Patent

active

048091626

ABSTRACT:
Data processing apparatus includes a data path having a path delay, from a source latch point to a destination latch point, of greater than one clock cycle. For an n-cycle path, where the path delay is between n- 1 and n clock cycles, data is latched into the source latch point at least n clock cycles in advance of the cycle on which it is needed at the destination latch point. The data and gating signals along the data path are held glitch-free in the source latch point until after the clock cycle on which the data is used in the destination latch point.

REFERENCES:
patent: 3840727 (1974-10-01), Amdahl et al.
patent: 4587611 (1986-05-01), Amdahl et al.
patent: 4589067 (1986-05-01), Porter et al.
patent: 4707783 (1987-11-01), Lee et al.

Affiliated with

Also associated with

Rating

Saving registers in data processing apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Saving registers in data processing apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Saving registers in data processing apparatus will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1373170