Static information storage and retrieval – Plural shift register memory devices
Patent
1987-10-22
1989-02-14
Hecker, Stuart N.
Static information storage and retrieval
Plural shift register memory devices
365189, 365221, 377 78, 377 79, G11C 700, G11C 1900, G11C 1928
Patent
active
048051390
ABSTRACT:
A propagating first-in, first-out (FIFO) storage device is driven by a two-phase non-overlapping clock and includes a plurality of storage cells (C1, . . . C4) and a plurality of tracking bit cell circuits (T1, . . . T4). Each of the storage cells includes first pass gate transistors (G1, . . . G8), first inverters (INV1, . . . INV8), second pass gate transistors (G9, . . . G16), and second inverters (INV9, . . . INV16). The first pass gate transistors are responsive to a control signal from the tracking circuit for loading data input signals into the first inverter means. The second pass gate transistors are responsive to a first phase of the clock for shifting the data input signals into the second inverters.
REFERENCES:
patent: 4151609 (1979-04-01), Moss
patent: 4390970 (1983-06-01), Kay
patent: 4409680 (1983-10-01), Schnathorst et al.
patent: 4651333 (1987-03-01), Cappon
patent: 4733376 (1988-03-01), Ogawa
IBM-TDB Complementary FET Static Shift Register, vol. 12, No. 12, May 1970, Guensslen et al.
IBM-TDB Complementary Shift Register, vol. 13, No. 2, Jul. 1970, Hastings.
Advanced Micro Devices , Inc.
Bowler Alyssa H.
Chin Davis
Hecker Stuart N.
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