Method to fill via holes between two conductive layers

Details Method to fill via holes between two conductive layers Method to fill via holes between two conductive layers

1996-08-22

1999-06-29

Vo, Peter

Metal working

Method of mechanical manufacture

Electrical device making

29847, 29853, 427 97, H05K 342

Patent

active

059157569

ABSTRACT:
A method of filling via holes between a lower conductive layer and an upper conductive layer whereby the hole is filled by the lower conductive layer. By optimizing conditions such as compressive stress and temperature during the deposition of the various layers, the method of the present invention ensures that at a predefined temperature, compressive force on the lower conductive layer causes hillocks to form inside the via holes.

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"Tungsten Cap Metallization for 0.5 .mu.m Via Fill Technology," Woo, et. al., J. Electrochem Soc., vol. 142, No. 11, Nov. 1995, .COPYRGT. The Electrochemical Society, Inc., pp. 3893-3895.
"Application of Force Fill Al-Plug Technology to 64Mb DRAM and 0.35 .mu.m Logic," Mizobuchi, et al., 1995 Symposium on VLSI Technology Digest of Technical Papers, Jun. 6-8, 1995, The Japan Society of Applied Physics/The IEEE Electron Devices Society, pp. 45-46.
"Conventional Approach to Via Fabrication and Formation of Metal-to-Metal Contacts through Vias," Silicon Processing for the VLSI Era--vol. II: Process Integration, Wolf, 1990, Lattice Press, Sunset Beach, Ca, pp. 240-259.

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