LDD structure containing conductive layer between gate oxide and

Fishing – trapping – and vermin destroying

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357 233, H01L 2960

Patent

active

048085448

ABSTRACT:
A method for manufacturing a semiconductor device is disclosed in which two essential process steps of forming a side wall spacer insulating film on a side wall of the gate electrode layer by reactive ion etching the silicon oxide film and preserving the conductive layer only beneath the side wall spacer insulating film by reactively ion-etching the conductive layer are included.

REFERENCES:
patent: 4642878 (1987-02-01), Maeda
patent: 4663645 (1987-05-01), Komori et al.
patent: 4727038 (1988-02-01), Watabe et al.
patent: 4754320 (1988-06-01), Mizutani et al.
"Fabrication of High Performance LDD FET's with Oxide Sidewall-Spacer Technology", P. J. Tsang et al., IEEE, vol. ED-29, #4, Apr. 1982.

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