Method and apparatus for performing prescaled division

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

G06F 752

Patent

active

054756308

ABSTRACT:
An arithmetic circuit 10 for performing prescaled division uses a rectangular multiplier 16 and accumulator 30 operable to calculate a short reciprocal and scaled dividend and divisor to enable the sequential iterative calculation of large radix quotient digits. Each quotient digit can be calculated using a single pass through the rectangular multiplier 16 and accumulator 30 and can be accumulated to form a full precision quotient in a quotient register 36.

REFERENCES:
patent: 3828175 (1974-08-01), Amdahl et al.
patent: 4337519 (1982-06-01), Nishimoto
patent: 4338675 (1982-07-01), Palmer et al.
patent: 4707798 (1987-11-01), Nakano
patent: 4725974 (1988-02-01), Kanazawa
patent: 4991132 (1991-02-01), Kadota
patent: 5020017 (1991-05-01), Ooms et al.
patent: 5065352 (1991-11-01), Nakano
Atkins, Daniel E., "Higher Radix Division Using Estimates of the Divisor & Partial Remainders", IEEE-C17-925-934 (1968).
Bose, et al. "Fast Multiply & Divide for a VLSI Floating Point Unit", IEEE-1987-Dept. of EE & Comp. Sci., Univ. of Calif.-Berkeley.
Ercegovac, M. D., "A Higher-Radix Division with Simple Selection of Quoitient Digits", IEEE-1983-6th Symposium on Computer Arithmetic.
Ercegovac, M. D. et al., "A Division Algorithm with Prediction of Quotient Digits", IEEE--1985--Comp. Sci. Dept., Univ. of CA--LA, pp. 51-56.
Fandrianto, J. "Algorithm for High Speed Shared Radix 4 Division & Radix 4 Square Root," 1987--IEEE, pp. 73-79.
Ferrari, Domenico, "A Division Method Using a Parallel Multiplier," IEEE--1967-EC-16:224-226 (1967) pp. 191-193.
IEEE Std. 754--1985, "Standard for Binary Floating Point Arithmetic".
Coonen, J. T., "Specifications For A Proposed Standard For Floating Point Arithmetic", Memo UCB/ERLM78/72, 1978 UC at Berkeley.
Krishnamurthy, E. V., "On Range-Transformation Techniques For Division, IEEE Transactions on Computers", vol. 19, Feb. 1970.
Krishnamurthy, E. V., "A More Efficient Range Transformation Algorithm for Signed Digit Division", Int. J. Control, 12, 1970, pp. 73-79.
Nandi, et al. "A Simple Technique For Digital Division" Commun. ACM 10, 1967, pp. 299-301.
Parikh, Shrikant, "An Architecture For A Rational Arithmetic Unit.", 1988, Dissertation Pres. to Comp. Sci & Engineering.
Svoboda, Antonin, "An Algorithm For Division" Inf. Process. Mach. 9, 1963 pp. 25-32.
Taylor, George S., "Compatible Hardware For Division & Square Root," IEEE-1981-Comp. Sci. Div., U of CA, Berkeley.
Tung, Chin. "A Division Algorithm For Signed-Digit Arithmetic", IEEE Transactions on Computers vol. 17, 1970.
Wong, et al. "Fast Division Using Accurate Quotient Approximations" IEEE--1991, Comp. Sci Press.
Flynn, Michael, "On Division By Functional Iteration" IEEE, vol. C-19, No. 8, Aug. 1970.
C. V. Freiman et al., "Composite Division Unit", IBM Technical Disclosure Bulletine, vol. 9, No. 8, Jan. 1967 pp. 994-995.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for performing prescaled division does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for performing prescaled division, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for performing prescaled division will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1365716

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.