Junction field-effect transistors formed on insulator substrates

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357 231, 357 237, 357 239, 357 2314, 357 4, 357 41, H01L 2980, H01L 2978, H01L 2712

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049144910

ABSTRACT:
A junction field effect transistor formed on insulator substrates particularly oxide substrates and having a polysilicon vertical control gate region formed of a cross member and two end members orthogonal thereto. The vertical control gate is formed over an n-channel in a Si island, the n-channel is located beneath the cross member, with p.sup.+ junction gate regions laterally disposed on either side of the n-channel and n.sup.+ drain and gate regions laterally orthogonal thereto in Si island.

REFERENCES:
patent: 3836993 (1974-09-01), Joshi
patent: 4479846 (1984-10-01), Smith et al.
patent: 4611220 (1986-09-01), MacIver
patent: 4700461 (1987-10-01), Choi et al.
"A Lateral Silicon-on-Insulator Bipolar Transistor with a Self-Aligned Base Contact"; IEEE Electron Device Letters; Sturm et al.; vol. EDL-8, No. 3, Mar. 1987; pp. 104-106.
"Silicon-on-Insulator Bipolar Transistors"; IEEE Electron Device Letters; Rodder and Antoniadis, vol. EDL-4, No. 6, Jun. 1983, pp. 193-195.
"An SOI Voltage-Controlled Bipolar-MOS Device"; IEEE Transactions on Electron Devices; Colinge; vol. ED-34, No. 4, Apr. 1987; pp. 845-849.
Drawing of Device Disclosed to the Inventor while Visiting the University of Wisconsin During Oct. of 1987.

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