Method for maintaining cache coherence in a multiprocessor compu

Details Method for maintaining cache coherence in a multiprocessor compu Method for maintaining cache coherence in a multiprocessor compu

1989-06-21

1993-03-23

Gossage, Glenn

Boots, shoes, and leggings

395400, 3642304, 36493144, 3649424, G06F 1200, G06F 1300

Patent

active

051971461

ABSTRACT:
A method is provided for maintaining cache coherence in a multiprocessor computer system having a potential for duplication of data in a plurality of storage location, where there is cache associated with each processor by storing a processor address and a "hint" or for each cache. More specifically, where the multiprocessor computer system employs doubly-linked lists for identifying a previous master of sharable data and a next master of the sharable data, the method includes the steps of passing the current address of the current master from the current master to the previous master; passing the current address of the current master from the current master to the next master; passing the current index of the current master from the current master to the previous master (the current index being a collection of all information needed by the current master to find a coherence block); and passing the current index of the current master from the current master to the next master.

REFERENCES:
patent: 4571674 (1986-02-01), Hartung
patent: 4713755 (1987-12-01), Worley, Jr. et al.
patent: 4747043 (1988-05-01), Rodman
patent: 4843542 (1989-06-01), Dashiell et al.
patent: 4847804 (1989-07-01), Shaffer et al.
patent: 4933835 (1990-06-01), Sachs et al.
patent: 5008813 (1991-04-01), Crane et al.
patent: 5025365 (1991-06-01), Mathur et al.
Gustavson et al., "The Scalable Coherent Interface Project (SuperBus)," Rev. 13, No. 1, Aug. 22, 1988, (IEEE direct circulation, David Gustavson, SLAC Bin 88, P.O. Box 4349, Stanford, Calif. 94309).

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