Pipeline processor for performing write instruction by referring

Details Pipeline processor for performing write instruction by referring Pipeline processor for performing write instruction by referring

1990-05-21

1993-03-23

Anderson, Lawrence E.

Boots, shoes, and leggings

36494834, 3649462, 3642318, 3642592, 364DIG1, 395800, 395425, G06F 930, G06F 938

Patent

active

051971348

ABSTRACT:
A pipeline processor adapted for a microprocessor executes pipeline processes. The pipeline processes comprise the steps of reading a machine language instruction; decoding the read instruction; generating an address according to the decoded instruction; reading operand data from a cache memory according to the generated address; executing the instruction; and writing data into the cache memory. When the machine language instruction is a write instruction, the operand data reading step involves a process of searching the cache memory for the address where data is to be written. A result of the search is held in flag memories. Thereafter, the data writing step involves a process of referring to the flag memories, and is completed in one machine cycle.

REFERENCES:
patent: 4594682 (1986-06-01), Drimak
patent: 4858111 (1989-08-01), Steps
patent: 4888722 (1989-12-01), Boreland
patent: 4958274 (1990-09-01), Dutton et al.
patent: 5021993 (1991-06-01), Natoba et al.

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