Method of manufacturing a semiconductor device having tapered pi

Details Method of manufacturing a semiconductor device having tapered pi Method of manufacturing a semiconductor device having tapered pi

1988-12-05

1990-04-03

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437194, 437246, 437228, H01L 21283

Patent

active

049140566

ABSTRACT:
A method of manufacturing a semiconductor device having multi-layer structure with tapered pillars containing a refractory metal used for connecting interconnection layers. An aluminum containing layer is formed on the semiconductor substrate and a refractory metal (or silicide and nitride) containing layer is formed on the aluminum layer. These two layers are selectively and successively etched to form an interconnection layer having thereon a pattern formed of the refractory metal containing layer. The pattern is selectively etched to remove a portion of the pattern from the interconnection layer and leave a portion on the interconnection layer to thereby form pillars. The tapered portions are formed by isotropic etching.

REFERENCES:
patent: 4536951 (1985-08-01), Rhodes et al.
patent: 4614021 (1986-09-01), Hulseweh
patent: 4670091 (1987-06-01), Thomas et al.
Vossen et al., Thin Film Processes, Academic Press, 1980, pp. 39-41.
Oakley et al., Proceeding of the 1984 IEEE VLSI Multilevel Interconnection Conference, Jun. 21-22, 1984, pp. 23-29.

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