Semiconductor integrated circuit device for limiting capacitive

Details Semiconductor integrated circuit device for limiting capacitive Semiconductor integrated circuit device for limiting capacitive

1992-04-21

1993-03-23

LaRoche, Eugene R.

357 71, H01L 2700, H01L 2348

Patent

active

051969203

ABSTRACT:
A semiconductor integrated circuit device having semiconductor integrated circuit blocks disposed close to each other. An insulating layer is interposed between each adjacent pair of the semiconductor integrated circuit blocks. An electroconductive shield member is formed between the adjacent semiconductor integrated circuit blocks to limit the capacitive coupling therebetween. The shield member is electrically insulated from the semiconductor integrated circuit blocks and is maintained at a predetermined fixed potential.

REFERENCES:
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patent: 5045915 (1991-09-01), Hinooka
patent: 5103288 (1992-04-01), Sukamoto et al.
Cavaliere et al., "Reduction of capacitive coupling between adjacent dielectrically supported conductors", IBM TDB, vol. 21, No. 12, May 1979, p. 4827.

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