Method of making structure for suppression of field inversion ca

Fishing – trapping – and vermin destroying

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437235, 437241, H01L 2144, H01L 2148

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054928656

ABSTRACT:
The invention relates to an integrated circuit including one or more amorphous silicon layers for neutralizing charges which occur in various dielectric layers during fabrication. The amorphous silicon layers include dangling silicon bonds which neutralize charges which would otherwise cause isolation breakdown, impair integrated circuit performance and increase manufacturing costs.

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