Flat panel display in which low-voltage row and column address s

Details Flat panel display in which low-voltage row and column address s Flat panel display in which low-voltage row and column address s

1992-04-07

1993-05-11

LaRoche, Eugene R.

Electric lamp and discharge devices: systems

Discharge device load

Discharge control discharge device load

3151691, 3151693, 3151694, G09G 310

Patent

active

052104729

ABSTRACT:
A flat panel display in which low-voltage row and column address signals control a much higher pixel activation voltage. Although the invention was created with field-emission displays in mind, the technique may be used in any matrix-addressable display (e.g. vacuum fluorescent, electro-luminescent, or plasma-type displays) where high pixel activation voltages must be switched. In a preferred embodiment field emission display, emitter-to-grid voltage differential is maintained near zero during non-emission periods, and is raised to a level sufficient to cause emission by grounding pixel emitters at each row and column intersection through a pair of series-connected field-effect transistors (FETs). The emitter base electrode of each emitter node is coupled to the grid via a current-limiting transistor. Display brightness control is accomplished by varying the gate voltages of either FET, such that emission current can be adjusted. In addition, a fusible link is placed in series with the grounding path through the series-connected FETs. Gray scale shading is accompanied by varying the duty cycle of pixel actuation time as a percentage of frame time.

REFERENCES:
patent: 4575765 (1986-03-01), Hirt
patent: 4866349 (1989-09-01), Weber et al.
patent: 4908539 (1990-03-01), Meyer
patent: 5015912 (1991-05-01), Spindt et al.
patent: 5075591 (1991-12-01), Holmberg
patent: 5089292 (1992-02-01), Macaulay et al.
patent: 5103144 (1992-04-01), Dunham
patent: 5103145 (1992-04-01), Doan

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