Substrate potential generating circuit employing Schottky diodes

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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3073172, 307285, 307303, 307304, 307578, H03K 301, H03K 326

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active

052104460

ABSTRACT:
Substrate bias generating circuit for MIS semiconductor device comprising an oscillating circuit, a capacitor, an MOS transistor and a Schottky barrier diode. One end of the oscillating circuit is connected to a V.sub.ss terminal which provides a reference potential. The capacitor is connected at one end thereof to the other end of the oscillating circuit. The MOS transistor is connected between the V.sub.ss terminal and the other end of the capacitor, with the Schottky barrier diode being connected between a node located between the other end of the capacitor and the MOS transistor, and the substrate. The Schottky barrier diode is operated by the majority carrier, thereby enabling the majority charge to be directly pumped out of the substrate and into the terminal V.sub.ss through the Schottky barrier diode with stability without requiring an injection of the minority charge into the semiconductor substrate. The pumping of the charge out of the substrate is permitted by lowering the potential of the node through the oscillating circuit.

REFERENCES:
patent: 4223238 (1980-09-01), Parkinson et al.
patent: 4255677 (1981-03-01), Boonstra et al.
IBM Tech. Disc. Bul. Vol. 27, No. 2, Jul 1984, "Substrate Voltage Regulation", Cassidy et al.
"Substrate and load Gate Voltage Compensation", 1976 IEEE ISSCC 76, Feb. 1976, Digest of Technical Papers, vol. XIX, 76CH1046-2 ISSCC.

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