Fishing – trapping – and vermin destroying
Patent
1993-03-15
1994-10-25
Thomas, Tom
Fishing, trapping, and vermin destroying
437162, 437 67, 437228, 437909, 148DIG11, H01L 21265
Patent
active
053588827
ABSTRACT:
A method for producing a bipolar transistor completely surrounded by an insulating trench in a substrate. Insulating regions at the surface of the substrate can be produced by depositing an SiO.sub.2 layer on the basis of thermal decomposition of TEOS and subsequent structuring of the SiO.sub.2 layer. The insulating regions can be employed as a self-aligning mask for the production of a collector terminal and of a substrate terminal.
REFERENCES:
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W. Brackelmann, et al., ISSCC Dig. Techn. Papers (1977), "THAM 10.1: A Masterslice LSI For Subnanosecond Random Logic".
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H. Kabza, et al., IEEE Electr. Dev. Lett. Bd. 10 (1989), Seite 344, "A 1-.mu.m Polysilicon Self-Aligning Bipolar Process for Low-Power High-Speed Integrated Circuits".
H. B. Pogge, IEEE BCTM 1990 Conf. Proc., 1990, p. 18, "Trench Isolation Technology".
E. Bertagnolli, et al., IEEE BCTM 1991 Conf. Proc., 1991, p. 34, "Modular Deep Trench Isolation Scheme for 38 GHz Self-Aligned Double Polysilicon Bipolar Devices".
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Bertagnolli Emmerich
Klose Helmut
Nguyen Tuan
Siemens Aktiengesellschaft
Thomas Tom
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