Decoder circuit with setting function of an output level

Details Decoder circuit with setting function of an output level Decoder circuit with setting function of an output level

1983-10-25

1986-10-28

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307453, 307463, H03K 19094

Patent

active

046201165

ABSTRACT:
A decoder circuit for use in a semiconductor member device or the like as a first metal insulator semiconductor field effect transistor (MISFET) acting as a load element, a plurality of parallel-connected MISFETs controlled by the output signals of an address buffer circuit serving as driver signals. Another MISFET is connected between the first MISFET and the parallel-connected MISFETS having a control signal applied to its gate. An output is taken from the junction between the first MISFET and the MISFET connected between the first MISFET and parallel-connected MISFETs. The decoder can generate an output signal regardless of the logic states of the input signals thereto.

REFERENCES:
patent: 3706975 (1972-12-01), Paluck
patent: 4021781 (1977-05-01), Caudel
patent: 4185321 (1980-01-01), Iwahashi et al.
patent: 4275312 (1981-06-01), Saitou et al.
patent: 4503341 (1985-03-01), Shah
Dockerty et al, "Enhancement/Depletion Decoder Circuit", IBM Tech. Disc. Bull., vol. 19, No. 5, Oct. 1976, pp. 1681-1682.

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