Single chip MOS/LSI microcomputer with binary timer

Details Single chip MOS/LSI microcomputer with binary timer Single chip MOS/LSI microcomputer with binary timer

1981-02-13

1982-09-07

Thomas, James D.

Boots, shoes, and leggings

235 92T, 364486, 364569, 364701, 368107, G06F 738, G06F 100

Patent

active

043487432

ABSTRACT:
A microcomputer which is implemented by MOS/LSI techniques on a single semiconductor chip is disclosed. The computer includes a data processing system having control logic means, means for exchanging data with peripheral devices through at least one data transfer port, an ALU, and program storage means in which a set of microprograms are stored including at least a first microprogram for controlling the execution of instructions issued from the control logic means. A binary timer is provided which permits operation in an interval timer mode, a pulse width measurement mode, and an event counter mode. The binary timer cooperates with an interrupt logic unit to process an interrupt request in response to time-out signals from the binary timer, and also in response to an external interrupt request. In a preferred embodiment, a derivative of the external interrupt request is synchronized with a machine clock cycle to permit interrupt request decoding operations to be performed during the same machine cycle that the interrupt request occurs thereby increasing the maximum bit rate at which serial information may be sampled through the external interrupt request input.

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