Symmetrical output complementary buffer

Details Symmetrical output complementary buffer Symmetrical output complementary buffer

1985-05-21

1986-10-14

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, 307579, 307475, 307269, 307513, 307601, 307602, 307605, H03K 19094, H03K 1920, H03K 17693, H03K 386

Patent

active

046174770

ABSTRACT:
A circuit generates complementary output signals which occur essentially simultaneously to each other. The circuit comprises three inverting and one non-inverting pairs of complementary transistors, typically field effect types. One of the inverting pairs provides the circuit inverted output. The output of the non-inverting pair is coupled to the output of another of the inverting pairs, which provide the circuit non-inverted output. In this manner, full Vss to Vcc output levels are achieved for substantially symmetrical output signals.

REFERENCES:
patent: 3591855 (1971-07-01), Dean et al.
patent: 3659286 (1972-04-01), Perkins et al.
patent: 3851189 (1974-11-01), Moyer
patent: 4074148 (1978-02-01), Sato
patent: 4296339 (1981-10-01), Murotani
patent: 4301535 (1981-11-01), McKenny
patent: 4451745 (1984-05-01), Itoh et al.
patent: 4477884 (1984-10-01), Iwahashi et al.

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