Monolithic sequential processor for four-quadrant multiplier arr

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307221D, 357 24, 364862, G06G 716

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active

043665500

ABSTRACT:
An integrated circuit sequential processor includes a charge-coupled device having input and output diffusion regions in a semiconductor substrate and a plurality of electrodes therebetween on an insulating layer formed on the semiconductor substrate. Switching means are coupled between an analog signal input and the electrodes for selectively applying a sequence of voltage potentials to the electrodes in order to meter onto the capacitor formed at the output diffusion region, charge corresponding to the sequence of voltage potentials. A circuit including a potential converting means is coupled to the output diffusion region for storing a potential indicative of the charge on the capacitor formed at the output diffusion region. The circuit also includes an output capacitor for providing an output potential indicative of the potential on the storing capacitor in response to a signal.

REFERENCES:
patent: 3942035 (1976-03-01), Buss
patent: 4034199 (1977-07-01), Lampe et al.
patent: 4058717 (1977-11-01), Engeler
patent: 4084256 (1978-04-01), Engeler et al.

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