Memory controller with burst mode capability

Details Memory controller with burst mode capability Memory controller with burst mode capability

1980-10-31

1982-12-28

Springborn, Harvey E.

Boots, shoes, and leggings

G06F 1300

Patent

active

043665390

ABSTRACT:
A memory controller coupled to a number of memory module units and includes a number of control circuits. The control circuits include address counter circuits which are loaded with a portion of the address of each predetermined type of command or memory request from a requesting device. This command when decoded causes the controller to read out from the memory module units a predetermined number of word pairs starting with the location specified by the stored address portion.

REFERENCES:
patent: 4025903 (1977-05-01), Kaufman et al.
patent: 4149239 (1979-04-01), Jenkins et al.
patent: 4151593 (1979-04-01), Jenkins et al.
patent: 4228500 (1980-10-01), Webster
patent: 4241399 (1980-12-01), Strecker et al.
patent: 4245299 (1981-01-01), Woods et al.

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